
Laurent Moll
Dr. Laurent Moll most recently served as Vice President of Engineering at Qualcomm where he led a 500-person team creating infrastructure IP for Qualcomm’s chips, including NoC interconnects, memory subsystems, cache coherency subsystems and more. Laurent has led a storied career for over two decades, performing key technical roles at industry leaders such as Digital Equipment Corporation, Compaq Computer Corporation, SiByte, Broadcom, Montalvo Systems and NVIDIA. Prior to his nearly 8-year tenure at Qualcomm, he was the Chief Technology Officer at Arteris Inc, a predecessor company of Arteris. Throughout his career, he has played an influential role in inventing the system-on-chip architectures, IP subsystems, and methodologies that are today the foundation of modern semiconductor design. Laurent earned his PhD in Computer Science at École Polytechnique and holds over 60 patents on various aspects of SoC technology.

Darren Jones
Darren started his career designing MIPS processors. From there, he transitioned to building large SoCs utilizing ARM processor IP. More recently, he served as VP of VLSI at two RISC-V startups, developing advanced SoCs for machine learning and AI. He is now a Solution Architect at Andes Technology, leveraging his CPU and SoC experience to help system designers solve their unique challenges using innovative IP.

Vikram Karvat
Mr. Karvat is a business leader with over 25 years of experience in the semiconductor industry spanning server, networking and storage markets, and has deep expertise in strategy development, product management, P&L management and M&A. He has held executive leadership positions at Marvell, Cavium and QLogic, and NetXen (Acquired by QLogic), and prior to that was at National Semiconductor and Broadcom (via Acquisition of ServerWorks).

Vishal Sarin
Vishal is a deep tech entrepreneur and engineer with over 25 years of success in numerous strategic leadership capacities in semiconductors and related systems. His calling is driving and leading company and technology vision, building exceptional business and engineering teams in both startup and large-scale organizations. His seminal work has been in analog in-memory computing using non-volatile memories. Underpinning this are his numerous innovations in associative and in-memory compute architectures; SLC/MLC/TLC/QLC flash; network processors, and artificial intelligence architectures. He has over 100 patents, authored numerous publications, and holds an MSEE from University of Michigan and an MBA from UC Berkeley.

Badarinath Kommandur
Badari has played a pivotal role in shaping the landscape of Advanced CPU design, Low Power Graphics, and Client SoC designs at Intel Corporation, contributing to over 10 generations of cutting-edge technology. His most recent role as a Senior Principal Engineer on the Meteor Lake Client SoC design team underscores his commitment to pushing the boundaries of design methodology, efficiency, and PPA optimization.
He has also completed the System Design & Management Fellows program at the Massachusetts Institute of Technology. A proud graduate of Arizona State University with a Master's degree in Electrical Engineering, Badari's focus was on VLSI design and Computer Architecture. Beyond his technical focus, Badari has made significant impacts in Intel Capital and Intel Labs, spearheading efforts in New Business Incubation and contributing to long-range research definition and commercialization.
Badari is currently a Fellow in Cadence Design Systems and leads the Physical Design CAD and TFM teams developing best in class IP's and Chiplets in the Silicon Solutions Group. He leads teams exploring the application of Gen AI and Agentic AI capabilities for improving design efficiency and PPA for Cadence IP's and Chiplets in SSG.